HBM2E

In what seems to be a major blunder by the SiPearl PR team, a recent visit by a local French politician resulted in the public Twitter posting in what looks like the floor plan of the company’s first-generation server chip project “Rhea”. During a visit of Alexandra Dublanche, a local Île-de-France politician and vice president of economic development and other responsibilities for the region, the PR teams had made some photo-op captures of a tour of the office. Amongst the published pictures includes a shot of the company’s Rhea server chip project with some new, until now unreleased details of the European Processor Initiative-backed project. Accélérer le développement européen de microprocesseurs à haute performance est un enjeu de souveraineté 🇪🇺 C’est le défi auquel s’attaque la pépite...

SK Hynix: HBM2E Memory Now in Mass Production

Just shy of a year ago, SK Hynix threw their hat into the ring, as it were, by becoming the second company to announce memory based on the HBM2E...

38 by Ryan Smith on 7/2/2020

Micron to Launch HBM2 DRAM This Year: Finally

Bundled in their latest earnings call, Micron has revealed that later this year the company will finally introduce its first HBM DRAM for bandwidth-hungry applications. The move will enable...

14 by Anton Shilov on 3/27/2020

Rambus Develops HBM2E Controller & PHY: 3.2 Gbps, 1024-Bit Bus

The latest enhancements to the HBM2 standard will clearly be appreciated by developers of memory bandwidth-hungry ASICs, however in order to add support of HBM2E to their designs, they...

42 by Anton Shilov on 3/6/2020

JEDEC Updates HBM2 Memory Standard To 3.2 Gbps; Samsung's Flashbolt Memory Nears Production

After a series of piecemeal announcements from different hardware vendors over the past year, the future of High Bandwidth Memory 2 (HBM2) is finally coming into focus. Continuing the...

24 by Ryan Smith on 2/3/2020

GlobalFoundries and SiFive to Design HBM2E Implementation on 12LP/12LP+

GlobalFoundries and SiFive announced on Tuesday that they will be co-developing an implementation of HBM2E memory for GloFo's 12LP and 12LP+ FinFET process technologies. The IP package will enable...

13 by Anton Shilov on 11/5/2019

Samsung Develops 12-Layer 3D TSV DRAM: Up to 24 GB HBM2

Samsung on Monday said that it had developed the industry’s first 12-layer 3D packaging for DRAM products. The technology uses through silicon vias (TSVs) to create high-capacity HBM memory...

11 by Anton Shilov on 10/7/2019

SK Hynix Announces 3.6 Gbps HBM2E Memory For 2020: 1.8 TB/sec For Next-Gen Accelerators

SK Hynix this morning has thrown their hat into the ring as the second company to announce memory based on the HBM2E standard. While the company isn’t using any...

23 by Ryan Smith on 8/12/2019

Samsung HBM2E ‘Flashbolt’ Memory for GPUs: 16 GB Per Stack, 3.2 Gbps

Samsung has introduced the industry’s first memory that correspond to the HBM2E specification. The company’s new Flashbolt memory stacks increase performance by 33% and offer double per-die as well...

25 by Anton Shilov on 3/20/2019

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