As part of AMD's Q1'2024 earnings announcement this week, the company is offering a brief status update on some of their future products set to launch later this year. Most important among these is an update on their Zen 5 CPU architecture, which is expected to launch for both client and server products later this year.

Highlighting their progress so far, AMD is confirming that EPYC "Turin" processors have begun sampling, and that these early runs of AMD's next-gen datacenter chips are meeting the company's expectations.

"Looking ahead, we are very excited about our next-gen Turin family of EPYC processors featuring our Zen 5 core," said Lisa Su, chief executive officer of AMD, at the conference call with analysts and investors (via SeekingAlpha). "We are widely sampling Turin, and the silicon is looking great. In the cloud, the significant performance and efficiency increases of Turin position us well to capture an even larger share of both first and third-party workloads."

Overall, it looks like AMD is on-track to solidify its position, and perhaps even increase its datacenter market share with its EPYC Turin processors. According to AMD, the company's server partners are developing a 30% larger number of designs for Turin than they did Genoa. This underscores how AMD's partners are preparing for even more market share growth on the back of AMD's ongoing success, not to mention the improved performance and power efficiency that the Zen 5 architecture should offer.

"In addition, there are 30% more Turin platforms in development from our server partners, compared to 4th Generation EPYC platforms, increasing our enterprise and with new solutions optimized for additional workloads," Su said. "Turin remains on track to launch later this year."

AMD's EPYC 'Turin' processors will be drop-in compatible with existing SP5 platforms (i.e., will come in an LGA 6096 package), which will facilitate its faster ramp and adoption of the platform both by cloud giants and server makers. In addition, AMD's next-generation EPYC CPUs are expected to feature more than 96 cores and a more versatile memory subsystem.

Source: AMD Q1'24 Earnings Call (via SeekingAlpha)



View All Comments

  • ballsystemlord - Thursday, May 2, 2024 - link

    Thanks! Reply
  • Dante Verizon - Thursday, May 2, 2024 - link

    25-30% Reply
  • del42sa - Thursday, May 2, 2024 - link

    "Looking ahead, we are very excited about our next-gen"

    they being excited every each generation product launch include RDNA3 ....
  • Makaveli - Thursday, May 2, 2024 - link

    What company isn't excited about their next gen products? Reply
  • SanX - Thursday, May 2, 2024 - link

    Couple months ago I have heard about 196 cores in Turin. Any news here? Reply
  • SanX - Thursday, May 2, 2024 - link

    Sorry, 192 Reply
  • nandnandnand - Thursday, May 2, 2024 - link

    Should be 128 Zen 5 cores for Turin Classic, or 192 Zen 5c cores for Turin Dense.

    For me, Zen 5 is interesting mostly for the consumer mobile variants from Strix Halo down to Sonoma Valley, and Zen 6 is worth a look everywhere if that's where the fundamental changes end up landing.
  • SanX - Friday, May 3, 2024 - link

    Pity current node shrinking became so tricky and giving less and less advantages... The 128 cores from current 96 for Zen 5 is around only 30% increase. In ideal world of scaling laws this sounds like switch from 5nm to 4 nm not to 3 nm because (5 / 3)^2 = 2.78 allows for more than doubling amount of cores while 4nm is the factor of (5 / 4)^2 = 1.56. Reply
  • nandnandnand - Friday, May 3, 2024 - link

    All of Zen 4 Epyc (using both Zen 4 and Zen 4c chiplets) is on TSMC N5. The 128-core Zen 5 Epyc is probably using N4X, which is part of the same 5nm family of nodes. The 192-core Zen 5c version is probably using N3.

    Based on this, there is barely any area scaling between N5 and N4X, but a decent jump when moving to N3.

    Sure, it's sad that the free lunch is running low for the moment, but I think 3D will revitalize everything once the industry figures out how to stack hundreds of layers of cores and memory without melting the chips in 10-20 years. And in the more immediate future, stacked cache is addressing the SRAM scaling problem very well. Before everything goes 3D, we'll probably see at least 3 "normal" node shrinks, the introduction of backside power delivery, etc.
  • SanX - Friday, May 3, 2024 - link

    According that article N3 even in 2022 was expecting to reduce power by 25-30% and almost doubling areal density (and slight increase of performance per core which is ok even if this increase would be zero). Given 360W power consumption of 96core N5p doubling amount of cores should bring AMD 500W TDP of N3p 192 core chip. It is reasonable to expect that current motherboards will sustain extra power with extra forced cooling. My current one from Gigabyte keeps such power OK, while water cooling keeps processor below 60C when run on peak power. You just need to install 3-4 small 1-2W forced blowers directed exactly on the inverter's heat radiators (by some reason they are inexcusably small). I would not complain if AMD delivered 1kW TDP and decent count of cores like 500. We will go there anyway Reply

Log in

Don't have an account? Sign up now