Samsung is on track to start volume production of DDR5 and LPDDR5 memory next year using a manufacturing technology that will take advantage of extreme ultraviolet lithography (EUVL). In fact, Samsung has been playing with EUV-enabled DRAM fabrication process for a while and has already validated DDR4 memory with select partners.

To date, Samsung has produced and shipped a million of DDR4 DRAM modules based on chips made using the company’s D1x process technology that uses EUV lithography. These modules have completed customer evaluations, which proves that Samsung’s 1st Generation EUV DRAM technology enables to build fine circuits. Samsung’s D1x is an experimental EUVL fabrication process that was used to make experimental DDR4 DRAMs, though it will not be used any further, the company said.

Instead, to produce DDR5 and LPDDR5 next year, the company will use its D1a, a highly-advanced 14 nm-class process with EUV layers. This technology is expected to double per-wafer productivity (DRAM bit output) when compared to D1x technology, which indicates that it uses thinner geomtries. Samsung did not reveal whether its D1a also uses other innovations (in addition to EUVL), such as pillar cell capacitors and dual work function layers for buried wordline gates, as anticipated by analysts from TechInsights who believe that scaling DRAM cell transistors and capacitor structures offer limited capability to scale further from current levels.

Timeline of Samsung DRAM Milestones
Date Milestone
2021 4th-gen 10nm-class (1a) EUV-based
16Gb DDR5/LPDDR5 mass production
March 2020 4th-gen 10nm-class (1a) EUV-based DRAM development
September 2019 3rd-gen 10nm-class (1z) 8Gb DDR4 mass production
June 2019 2nd-gen 10nm-class (1y) 12Gb LPDDR5 mass production
March 2019 3rd-gen 10nm-class (1z) 8Gb DDR4 development
November 2017 2nd-gen 10nm-class (1y) 8Gb DDR4 mass production
September 2016 1st-gen 10nm-class (1x) 16Gb LPDDR4/4X mass production
February 2016 1st-gen 10nm-class (1x) 8Gb DDR4 mass production
October 2015 20nm (2z) 12Gb LPDDR4 mass production
December 2014 20nm (2z) 8Gb GDDR5 mass production
December 2014 20nm (2z) 8Gb LPDDR4 mass production
October 2014 20nm (2z) 8Gb DDR4 mass production
February 2014 20nm (2z) 4Gb DDR3 mass production
February 2014 20nm-class (2y) 8Gb LPDDR4 mass production
November 2013 20nm-class (2y) 6Gb LPDDR3 mass production
November 2012 20nm-class (2y) 4Gb DDR3 mass production
September 2011 20nm-class (2x) 2Gb DDR3 mass production
July 2010 30nm-class 2Gb DDR3 mass production
February 2010 40nm-class 4Gb DDR3 mass production
July 2009 40nm-class 2Gb DDR3 mass production

Usage of EUVL will enable Samsung (and eventually other memory makers) to reduce (or eliminate) usage of multi patterning, which enhances patterning accuracy and therefore improves performance and yields. The latter will be beneficiary for production of high-performance high-capacity DDR5 chips as they are meant to increase both performance (up to DDR4-6400) and capacity (up to 32 Gbps). Samsung has not officially revealed how many EUV layers do its D1x and D1a process technologies use.

In addition to revealing its EUV-related achievements, Samsung also said that in the second half this year its P2 fab near Pyeongtaek, South Korea, will begin operations later this year. Initially, the facility will ‘make next-generation premium DRAMs’.

Jung-bae Lee, executive vice president of DRAM Product & Technology at Samsung Electronics, said the following:

"With the production of our new EUV-based DRAM, we are demonstrating our full commitment toward providing revolutionary DRAM solutions in support of our global IT customers. This major advancement underscores how we will continue contributing to global IT innovation through timely development of leading-edge process technologies and next-generation memory products for the premium memory market."

Related Reading:

Source: Samsung

Comments Locked


View All Comments

  • haukionkannel - Wednesday, March 25, 2020 - link

    True... Maybe servers will move to ddr5 2021 to 2022 and consumers 2022-2023 depending on price.
  • Santoval - Wednesday, March 25, 2020 - link

    The upcoming Zen 3 based CPUs will be the last to use the AM4 socket. Zen 4 CPUs next year will switch to the AM5 socket and (almost certainly) to DDR5 as well. I cannot see how DDR5 support could be "optional" since the DRAM slots will change, and DDR5 is not backwards compatible.
    Zen 4 based APUs, in turn, should switch to LPDDR5. The LP variant of DDR5 is already a thing (for some premium phones) but I doubt Zen 3 based APUs will support it.
  • Diogene7 - Thursday, March 26, 2020 - link

    Even though I think that DDR5/LPDDR5 will bring benefits in terms of power consumption, I would be much more interested in the implementation of Non Volatile Memory (NVM) and Storage Class Memory (SCM) through for example the JEDEC NVDIMM-P protocol, which seems to rely somewhat on DDR5 specifications, or alternatively maybe CXL & Gen-z protocol.

    I believe the sooner consumer CPU support the use of NVM, the sooner we will see innovation blossom around it like commercialisation of different kind of new NVM (STT-MRAM, ReRAM, Carbon Nanotube NRAM,...) and new system functionalities / behaviors.

    As much as I wish that AMD implement this in consumer Zen4 CPU, as it would clearly bring differentiation opportunities to system built around them (depending on the type and quantity of NVM implemented in such system), it seems unlikely for 2021 / 2022... and may have to wait closer to 2025 :(...
  • asmian - Wednesday, March 25, 2020 - link

    >The latter will be beneficiary for production

    A beneficiary is one who benefits. You mean *beneficient*.
  • Alistair - Wednesday, March 25, 2020 - link

    will benefit production
  • ksec - Wednesday, March 25, 2020 - link

    > and capacity (up to 32 Gbps)

    That is a typo.

Log in

Don't have an account? Sign up now