Samsung has begun mass production of the industry’s first 16 GB LPDDR5 memory for upcoming smartphones, such as the Galaxy S20 Ultra 5G handsets. The new DRAM devices not only offer higher capacity, but they are also 30% faster than previous-generation LPDDR4X-4266 used for previous-generation cellphones.

Samsung’s latest 16 GB LPDDR5 package consists of eight 12 Gb chips and four 8 Gb chips featuring a 5500 MT/s data transfer rate that can provide bandwidth of up to 44 GB/s. The very complex 12-device assembly is called a ‘mixed mode package’ because it contains DRAM devices that are accessed differently in different ranks. Samsung does not publish voltages of the new multi-chip 16 GB DRAM assembly, but only claims that it delivers more than 20% energy savings when compared to an 8 GB LPDDR4X package. Meanwhile, we do know that LPDDR5 memory chips feature a variable voltage that is up to 1.1 V.

The 12 Gb LPDDR5 devices are made using Samsung’s 2nd Generation 10 nm-class fabrication technology (also known as 1y nm), but the company does not disclose which manufacturing process is used to build 8 Gb LPDDR5 devices (though we are probably talking about 1y nm here as well).

Typically, DRAM makers make mass production announcements after they ship the first batch of products to a client. Considering that Samsung’s Galaxy S20 Ultra features 16 GB of LPDDR5 memory, it is more than reasonable to assume that it uses the company’s latest 16 GB LPDDR5-5500 DRAM package.

In the second half of this year Samsung plans to start production of 16 Gb LPDDR5 devices using its 3rd Generation 10 nm-class fabrication process (aka 1z). These chips will support speeds up to 6400 MT/s, but to take advantage of them Samsung will have to develop an SoC that supports such a high data transfer rate. Meanwhile, capacities of these upcoming LPDDR5 assembles remain to be seen.

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Source: Samsung

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  • ZoZo - Wednesday, February 26, 2020 - link

    Hum... by which logic can an increase in the number of memory channels translate in better latency? In fact, in practice, that's the opposite of what we see on HEDT platforms. They have significantly worse memory latency than the mainstream ones.
  • peevee - Thursday, February 27, 2020 - link

    It is not about memory channels, it is about slots being on the CPU package physically reducing the length of connectors. And yes, at present speeds it does play a big role in memory latency (speed of light in metal is not c if you are willing to make some calculations).
  • James5mith - Wednesday, February 26, 2020 - link

    Many modern smartphone SoC's use PoP:

    Standard config for most snapdragon devices is RAM on top of SoC. I have never understood how that doesn't cause a hot zone, but that is why I'm not an electrical engineer.

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