AnandTech Storage Bench - The Destroyer

The Destroyer is an extremely long test replicating the access patterns of very IO-intensive desktop usage. A detailed breakdown can be found in this article. Like real-world usage and unlike our Iometer tests, the drives do get the occasional break that allows for some background garbage collection and flushing caches, but those idle times are limited to 25ms so that it doesn't take all week to run the test.

We quantify performance on this test by reporting the drive's average data throughput, a few data points about its latency, and the total energy used by the drive over the course of the test.

AnandTech Storage Bench - The Destroyer (Data Rate)

The Q300's average data rate during The Destroyer was slightly better than the Trion 100 480GB, and puts the Q300 around the middle of the pack and well ahead of the Crucial BX200. It's also slightly ahead of the Plextor M6V, a drive that uses MLC flash and prioritizes power efficiency over performance.

AnandTech Storage Bench - The Destroyer (Latency)

The average service time of the Q300 on The Destroyer is considerably worse than the Trion 100, and near the bottom of the chart. The performance consistency test showed the Q300 as significantly more variable than the Trion 100 before reaching steady state, so this result isn't inexplicable.

AnandTech Storage Bench - The Destroyer (Latency)

AnandTech Storage Bench - The Destroyer (Latency)

The Q300 has more severe latency outliers than the Trion 100, though neither drive is great at limiting latency.

AnandTech Storage Bench - The Destroyer (Power)

The Q300 shows improved power efficiency over the Trion 100, but the MLC drives are all better.

Performance Consistency AnandTech Storage Bench - Heavy
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  • bill.rookard - Friday, February 26, 2016 - link

    MX100's are awesome drives, I have a pair in my webserver with a M4 for the boot drive. Sadly, the whole issue appears to be (with the exception of Samsungs drives) the TLC. When having to account for the 8 different voltage states required for 3 bit per cell it seems that the controllers are not up to the task of getting things done quickly.

    I'm thinking widespread adoption of V-nand (regardless of manufacturer) along with MLC in a larger lithography will wind up being the perfect storm of capacity, price, speed and endurance.
  • Arnulf - Friday, February 26, 2016 - link

    TLC cells have 8 distinct voltage levels per cell to make up for 3 bits of information, not 3.
  • hojnikb - Friday, February 26, 2016 - link

    thats what he said.
  • kmmatney - Friday, February 26, 2016 - link

    No, he said 3, not 3
  • vladx - Friday, February 26, 2016 - link

    "No, he said 3, not 3"

    Huh?
  • boozed - Friday, February 26, 2016 - link

    It's really quite simple. He said 3, not 3.
  • extide - Friday, February 26, 2016 - link

    I think what we will see is 3D TLC in pretty much all mainstream stuff, and 3D MLC in the high performance stuff.
  • Samus - Friday, February 26, 2016 - link

    It's too bad the MX100 and BX100 are harder and harder to find, when the MX200 and ESPECIALLY the BX200 are inferior.
  • leexgx - Friday, February 26, 2016 - link

    the BX100 its perfect for laptops as its super power efficient, the MX100/BX100 is the most use the most power SSD (the Adata Sp550 also uses the BX200 controller)
  • leexgx - Friday, February 26, 2016 - link

    ops!! MX200/B200 or any SSD that uses TLC with SLC cache seem to be extremely high power usage, for minimal overall speed boost (and higher chance of data loss due to SLC/TLC data movement)

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