Arm Cortex A725: Improvements to Middle Core Efficiency

The Arm Cortex-A725 is designed to balance performance and power efficiency, making it a critical component of the second-generation Armv9.2 architecture. Positioned as a mid-tier core, it complements the high-performance Cortex-X925 by offering robust capabilities for everyday computing tasks while maintaining energy efficiency. This core is especially targeted at devices that require consistent performance without the high power consumption associated with top-tier cores, such as smartphones, tablets, and laptops.

The Cortex-A725 builds on the successes of its predecessor, the Cortex-A720, with several key architectural enhancements. One of the significant improvements is the increased instruction issue queue and the expanded reorder buffer, which enable the core to handle more instructions simultaneously and execute them out of order for improved efficiency. This increase in the out-of-order execution window size allows the Cortex-A725 to utilize its execution units better, leading to smoother and faster processing of complex workloads.

The core also benefits from a new 1MB L2 cache configuration, which provides faster access to frequently used data and instructions. This larger cache size is designed to reduce latency and improve performance, particularly for applications that require rapid data retrieval. Additionally, the Cortex-A725 features enhancements in its register file structure, further streamlining data processing and reducing bottlenecks.

Power efficiency is a crucial aspect of the Cortex-A725's design. With leading-edge 2024 Cortex chips expected to be fabbed on newly-available 3nm process technologies from TSMC and others, the improved performance from these nodes is able to drive big improvements in energy efficiency, and Arm is leaning into that heavily with the A725. Overall, Arm is touting that A725 delivers significant power savings compared to previous generations. Compared to the Cortex-A720, the Cortex-A725 offers up to a 25% improvement in power efficiency (and 20% L3 traffic reduction), making it an ideal choice for mobile devices that require long battery life.

The core also features advanced power management capabilities, including dynamic voltage and frequency scaling (DVFS) and half-slice power-down modes. These features allow the Cortex-A725 to adjust its power consumption based on the current workload, ensuring energy is used efficiently without sacrificing performance. 

Arm Cortex X925: Leading The Way in Single-Threaded IPC Arm Cortex A520: Same 2023 Core Optimized For 3nm
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  • EthiaW - Sunday, June 2, 2024 - link

    I know it takes solid work(and money) to adapt a certain architecture to the newest node, ARM can claim some credit but not all.
    By the way, ARM has a long history of not-so-reliable projection. Remember A57 and X1 that came after much hype only to flop badly? And A72/A78 that was supposed to be minor upgrade but turned out classic? Always view their claim with a pinch of salt.
    Reply
  • mode_13h - Monday, June 3, 2024 - link

    > ARM has a long history of not-so-reliable projection.
    > Remember A57 and X1 that came after much hype only to flop badly?

    Did they fail to hit their power or performance projections? Source?
    Reply
  • eastcoast_pete - Sunday, June 2, 2024 - link

    Question @Gavin and @Ryan: I might have completely missed it, but have Qualcomm and ARM settled their legal fight regarding Qualcomm's right to use the custom Nuvia designs in their SoCs? I almost assume so, as Qualcomm is otherwise proceeding at great risk regarding possible liabilities. Reply
  • mode_13h - Monday, June 3, 2024 - link

    No, I didn't hear anything about it (projections by legal experts were that it wouldn't be wrapped up by now, either), and I'm not seeing any recent hits on it in Google News. Reply
  • skavi - Monday, June 3, 2024 - link

    how much of this article was written by an llm? Reply

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